1. Field of the Invention
The present invention relates to a distortion compensation circuit which is used in a wireless transmitting apparatus such as a base station in a wireless communication system to make compensation for a distortion caused in amplification means such as a power amplifier which amplifies an input signal.
2. Description of the Related Art
In a wireless transmitting apparatus in a wireless communication system, it is ideal to use a power amplifier having linearity with respect to all amplitude components in order to minimize adjacent-channel-leakage power as small as possible. A power amplifier having good linearity with respect to a wide amplitude component range, however, is large in scale and high-priced and has large power consumption. In some case, therefore, there is no way other than a power amplifier having nonlinearity with respect to large-amplitude components while having good linearity with respect to small-amplitude components. If an amplitude component of a power level higher than the mean power level is amplified by using such a power amplifier, adjacent-channel-leakage power is increased.
Then, various distortion compensation techniques have been proposed for the purpose of reducing adjacent-channel-leakage power due to nonlinearity of power amplification means. Typical examples of such distortion compensation techniques are feedforward method, Cartesian feedback method, and the predistortion method. It is difficult to improve the efficiency of an amplification system using the feedforward method because of the need for an error amplifier. Recently, distortion compensation made by the Cartesian feedback method or the predistortion method capable of distortion compensation in a base band on a digital orthogonal coordinate system has been studied from the viewpoint of achieving cost-reduction and efficiency-improvement effects. (See, for example, Japanese Patent Laid-open Nos. 8-78967 and 8-251246).
In the Cartesian feedback method, however, the amount of improvement in distortion is proportional to the loop gain and it is, therefore, difficult to increase the bandwidth in which a distortion improvement effect can be achieved in increasing the distortion improvement effect and maintaining the loop stability in feedback. In a mobile communication system, therefore, the predistortion method capable of increasing the bandwidth is effectively used. A description will be given of the predistortion method.
FIG. 9 is a block diagram showing an example of a configuration of a wireless transmitting apparatus having a conventional predistortion-type distortion compensation circuit. This wireless transmitting apparatus has a transmission data generation unit 1, digital-to-analog (D/A) converters 31 and 32, a quadrature modulator 4, a reference signal generation unit 5, a power amplifier 6, a directional coupler 7, and a distortion compensation circuit 30. The distortion compensation circuit 30 is constituted by a nonlinear distortion compensation computation section 2, a quadrature demodulator 8, an analog-to-digital (A/D) converters 91 and 92, an amplitude computation section 10, and an error computation and compensation data updating section 91.
The nonlinear distortion compensation computation section 2 performs computation for distortion compensation on digital orthogonal baseband transmission signals I and Q from the transmission data generation unit 1 by performing complex multiplication of these signals on the basis of distortion compensation data (amplitude compensation data K and phase compensation data θ). Orthogonal baseband transmission signals I′ and Q′ after distortion compensation computation are converted into analog orthogonal baseband signals by the D/A converters 31 and 32. The quadrature modulator 4 modulates the analog orthogonal baseband signals into a orthogonally modulated signal with a signal from the reference signal generation unit 5. The orthogonally modulated signal is power amplified by the power amplifier 6 to be output as a radio frequency (RF) output.
Part of the output from the power amplifier 6 is fed back to the quadrature demodulator 8 by the directional coupler 7 to be demodulated into analog orthogonal baseband signals with the signal from the reference signal generation unit 5. The analog orthogonal baseband signals are converted into digital orthogonal baseband signals I″ and Q″ by the A/D converters 91 and 92. The error computation and compensation data updating section 91 updates the distortion compensation data by comparing the feedback digital orthogonal baseband signals I″ and Q″ and the orthogonal baseband signals I and Q from the transmission data generation unit 1 and using as an address an amplitude value from the amplitude computation section 10. The nonlinear distortion compensation computation section 2 makes distortion compensation on the basis of the updated distortion compensation data.
In the arrangement shown in FIG. 9 as an example of a predistortion-type distortion compensation circuit, a power value which is the second power of the amplitude value may be used as an address instead of the amplitude value from the amplitude computation section 10.
FIG. 10 shows a configuration of the error computation and compensation data updating section 91 shown in FIG. 9. As shown in FIG. 10. the error computation and compensation data updating section 91 is constituted by an error computation section 12, an error compensation data memory 13, a distortion compensation data memory 14, multipliers 211 and 212, and adders 221 and 222.
The error computation and compensation data updating section 91 repeats a computation in which errors between orthogonal baseband signals I and Q, which are input signals, and orthogonal baseband signals I″ and Q″, which are obtained by demodulating part of the output from the power amplifier 6, are computed to obtain error data and values obtained by multiplying this error data by step coefficients α and β are added to the distortion compensation data (amplitude compensation data Kn and phase compensation data θn) before updating, thereby computing new distortion compensation data (amplitude compensation data Kn+1 and phase compensation data θn+1). In this manner, the distortion compensation data for compensation for nonlinear distortion is updated.
Since the distortion compensation data varies depending on the amplitude value of the input signals, the distortion compensation data corresponding to a certain amplitude value is updated only when the amplitude value of the input signals becomes equal to the certain amplitude value. In the following description, if the number of times the distortion compensation data corresponding to the certain amplitude value is updated (referred to) is n, the amplitude value of the input signals when it becomes equal to the certain amplitude value at the nth time is expressed as rn.
The error computation section 12 compares the input signals I and Q having the amplitude value rn and the feedback signals I″ and Q″ on a polar coordinate system, thereby computes an amplitude error Ea(rn) and a phase error Ep(rn), also computes a value Ea(rn)/rn by dividing the amplitude error Ea(rn) by the amplitude value rn of the input signals, and outputs the computed errors and the value Ea(rn)/rn as error data to the error compensation data memory 13.
The error compensation data memory 13 is a rewritable memory for temporarily storing error data computed by the error computation section 12 by using as an address the amplitude value rn computed by the amplitude computation section 10.
The multiplier 211 performs a computation which is multiplication of the phase error Ep(rn) from the error compensation data memory 13 by the predetermined step coefficient β, and outputs the result of this computation. The multiplier 212 performs a computation in which the value Ea(rn)/rn from the error compensation data memory 13, i.e., the value obtained by dividing the amplitude error Ea(rn) by the amplitude value rn, is multiplied by the predetermined step coefficient α, and outputs the result of this computation.
The adder 221 performs a computation in which phase compensation data θn before updating, output from the distortion compensation data memory 14, is added to the result of computation from the multiplier 211, and outputs the result of this computation to the distortion compensation data memory 14 as phase compensation data θn+1 after updating. The adder 222 performs a computation in which amplitude compensation data Kn before updating, output from the distortion compensation data memory 14, is added to the result of computation from the multiplier 212, and outputs the result of this computation to the distortion compensation data memory 14 as amplitude compensation data Kn+1 after updating.
The distortion compensation data memory 14 outputs to the nonlinear distortion compensation computation section 2 amplitude compensation data Kn and phase compensation data θn corresponding to the amplitude value rn from the amplitude computation section 10, and newly stores, as compensation data corresponding to the amplitude value rn of the input signals, distortion compensation data (amplitude compensation data Kn+1 and phase compensation data θn+1) after updating from the adders 221 and 222.
The operation of the error computation and compensation data updating section 91 in this conventional distortion compensation circuit 30 will be described with reference to FIG. 10.
It is assumed that the amplitude of the input signals at a certain point in time is rn and amplitude compensation data and phase compensation data which are distortion compensation data corresponding to the amplitude value rn and which is stored in the distortion compensation data memory 14 at the corresponding time are Kn and θn, respectively. The error computation section 12 compares input signals I and Q having the amplitude value rn and feedback signals I″ and Q″ on the polar coordinate system, thereby computes amplitude error Ea(rn) and phase error Ep(rn), and also computes Ea(rn)/rn. This error data is temporarily stored in the rewritable error compensation data memory 13 with rn used as an address.
If the amplitude value of the input signals at the next time when it becomes equal to rn is rn+1, amplitude compensation data Kn+1 and phase compensation data θn+1 corresponding to the amplitude value rn+1 are obtained by the multipliers 211 and 212 and the adders 221 and 222 performing the following repeated computation processing by referring to amplitude compensation data Kn and phase compensation data θn stored in the distortion compensation data memory 14 using the amplitude value rn as an address.Kn+1=Kn+α·{Ea(rn)/rn}θn+1=θn+β·Ep(rn)  (1)
The distortion compensation data in the rewritable distortion compensation data memory 14 is updated to the distortion compensation data obtained by the above-described processing with the amplitude value as an address, and the nonlinear distortion compensation computation section 2 shown in FIG. 9 performs complex multiplication on the basis of the distortion compensation data updated at successive times, thus realizing adaptive distortion compensation control.
Each of the multiplication coefficient α in the repeated computation processing on amplitude compensation data by the equation (1) shown above and the multiplication coefficient β in the repeated computation processing on phase compensation data is a step coefficient in repeated computation independent of the convergence value and having an influence on the convergence time and stability. Ordinarily, a certain fixed value is used as the multiplication coefficient.
If each step coefficient is set to a smaller value, the convergence time before the completion of convergence of distortion compensation data to the optimum value is increased, as shown in FIG. 11A. However, if each step coefficient is set to a larger value for the purpose of reducing the convergence time, distortion compensation data vibrates instead of converging with stability, as shown in FIG. 11B. In setting the step coefficients, therefore, values selected as the step coefficients are optimized by considering the convergence time and stability. However, the optimum values vary depending on the amplitude of the input signals. In the conventional distortion compensation circuit, the step coefficients in repeated computation for obtaining distortion compensation data are set constant regardless of the magnitude of the amplitude value of the input signals and, therefore, are not necessary optimum values with respect to some amplitude value when they are optimum with respect to another amplitude value. Consequently, it is not possible to achieve a reduction in convergence time while improving the stability of distortion compensation with respect to all amplitude values.
As described above, the conventional distortion compensation circuit has a problem in that, since the step coefficients in repeated computation for obtaining distortion compensation data are set to constant values regardless of the amplitude value of input signals, it is not possible to reduce the convergence time while maintaining the stability of distortion compensation.